Class Schedule By State
Schedule updated December 19, 2008
Dates are subject to change. Contact your local training representative with any questions.
Registration (requires login)
Xilinx trademarks
- PlanAhead™ software
- LogiCORE™ IP
- Virtex®-5 family
- AccelDSP™ synthesis tool
| Alberta |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Arizona |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Advanced FPGA Implementation |
1/15/09-1/16/09 |
Black Canyon Conference Center/Phoenix |
1,000 |
10 |
Register |
| Fundamentals of FPGA Design |
2/23/09-2/23/09 |
Black Canyon Conference Center/Phoenix |
500 |
5 |
Register |
| Designing for Performance |
2/24/09-2/25/09 |
Black Canyon Conference Center/Phoenix |
1,000 |
10 |
Register |
| Designing with the PlanAhead Analysis and Design Tool |
2/26/09-2/27/09 |
Black Canyon Conference Center/Phoenix |
1,000 |
10 |
Register |
| British Columbia, Canada |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| California (Northern) |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Fundamentals of FPGA Design |
1/20/09-1/20/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
500 |
5 |
Register |
| Designing for Performance |
1/21/09-1/22/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Introduction to Verilog |
1/26/09-1/28/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,500 |
15 |
Register |
| Advanced FPGA Implementation |
1/29/09-1/30/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Minimizing Your Design Time with the ChipScope Pro Debug and Verification Toolst |
2/3/09-2/3/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
500 |
5 |
Register |
| Advanced Features and Techniques of Embedded Systems Development |
2/4/09-2/5/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| Introduction to VHDL |
2/10/09-2/12/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,500 |
15 |
Register |
| DSP Implementation Techniques for Xilinx FPGAs |
2/18/09-2/20/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,800 |
18 |
Register |
| Fundamentals of FPGA Design |
2/18/09-2/18/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
500 |
5 |
Register |
| Designing for Performance |
2/19/09-2/20/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Embedded Systems Software Development |
2/24/09-2/25/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Designing a LogiCORE PCI Express System |
3/3/09-3/4/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Embedded Systems Development |
3/3/09-3/4/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| Designing with the PlanAhead Analysis and Design Tool |
3/5/09-3/6/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Fundamentals of FPGA Design |
3/10/09-3/10/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
500 |
5 |
Register |
| Designing for Performance |
3/11/09-3/12/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Embedded Open-Source Linux Development |
3/17/09-3/18/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| DSP Design Using System Generator |
3/19/09-3/20/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| Advanced FPGA Implementation |
3/24/09-3/25/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| DSP Implementation Techniques for Xilinx FPGAs |
4/1/09-4/3/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,800 |
18 |
Register |
| Fundamentals of FPGA Design |
4/1/09-4/1/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
500 |
5 |
Register |
| Designing for Performance |
4/2/09-4/3/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Advanced Features and Techniques of Embedded Systems Development |
4/7/09-4/8/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,200 |
12 |
Register |
| Advanced FPGA Implementation |
4/7/09-4/8/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,000 |
10 |
Register |
| Introduction to VHDL |
4/14/09-4/16/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,500 |
15 |
Register |
| DSP Implementation Techniques for Xilinx FPGAs |
4/28/09-4/30/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,800 |
18 |
Register |
| Fundamentals of FPGA Design |
5/5/09-5/5/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
500 |
5 |
Register |
| Introduction to Verilog |
5/5/09-5/7/09 |
Xilinx Learning Center - San Jose, CA, USA (20) |
1,500 |
15 |
Register |
| California (Southern) |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Introduction to VHDL |
1/19/09-1/21/09 |
Holiday Inn - Costa Mesa Orange Co. Airport |
1,500 |
15 |
Register |
| Fundamentals of FPGA Design |
1/26/09-1/26/09 |
Holiday Inn - Costa Mesa Orange Co. Airport |
500 |
5 |
Register |
| Designing for Performance |
1/27/09-1/28/09 |
Holiday Inn - Costa Mesa Orange Co. Airport |
1,000 |
10 |
Register |
| Designing with the PlanAhead Analysis and Design Tool |
1/29/09-1/30/09 |
Holiday Inn - Costa Mesa Orange Co. Airport |
1,000 |
10 |
Register |
| Introduction to VHDL |
2/2/09-2/4/09 |
Embassy Suites LAX North |
1,500 |
15 |
Register |
| Embedded Systems Development |
2/9/09-2/10/09 |
Holiday Inn - Costa Mesa Orange Co. Airport |
1,200 |
12 |
Register |
| Advanced Features and Techniques of Embedded Systems Development |
2/11/09-2/12/09 |
Holiday Inn - Costa Mesa Orange Co. Airport |
1,200 |
12 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| District Of Columbia |
| For this location, please visit our ATP site for the complete class schedule: Bottom Line Technologies |
| Georgia |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Fundamentals of FPGA Design |
1/13/09-1/13/09 |
Black Canyon Conference Center/Phoenix |
600 |
6 |
Register |
| Designing for Performance |
1/14/09-1/15/09 |
Black Canyon Conference Center/Phoenix |
1,300 |
13 |
Register |
| Embedded Systems Development |
3/17/09-3/18/09 |
Hyatt Place Atlanta/Duluth/Johns Creek |
1,400 |
14 |
Register |
| Advanced FPGA Implementation |
4/28/09-4/29/09 |
Hyatt Place Atlanta/Duluth/Johns Creek |
1,400 |
14 |
Register |
| No classes scheduled for the next 4 months in this location. Request a Private or Public Class |
| Idaho |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| Indiana |
| For this location, please contact the ATP for the complete class schedule: Vai Logic |
| Kentucky |
| For this location, please contact the ATP for the complete class schedule: Vai Logic |
| Massachusetts |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Embedded Open-Source Linux Development |
1/7/09-1/8/09 |
Genesis Associates - Burlington, MA |
1,600 |
16 |
Register |
| Advanced FPGA Implementation |
1/20/09-1/21/09 |
Genesis Associates - Burlington, MA |
1,400 |
14 |
Register |
| Advanced Features and Techniques of Embedded Systems Development |
3/3/09-3/4/09 |
Genesis Associates - Burlington, MA |
1,500 |
15 |
Register |
| Designing with the PlanAhead Analysis and Design Tool |
3/24/09-3/25/09 |
Genesis Associates - Burlington, MA |
1,400 |
14 |
Register |
| Minimizing Your Design Time with the ChipScope Pro Debug and Verification Tools |
3/26/09-3/26/09 |
Genesis Associates - Burlington, MA |
600 |
6 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Manitoba, Canada |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Maine |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Nevada |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Advanced VHDL |
1/8/09-1/9/09 |
Watermark Executive Suites - Las Vegas |
1,000 |
10 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| New Hampshire |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| New Mexico |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| Ohio |
| For this location, please contact the ATP for the complete class schedule: Vai Logic |
| Ontario, Canada |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| DSP Design Using System Generator |
1/13/09-1/14/09 |
Electro-Source Kanata (Ottawa) Ontario, CAN |
1,400 |
14 |
Register |
| Embedded Systems Development |
2/3/09-2/4/09 |
Electro-Source Kanata (Ottawa) Ontario, CAN |
1,400 |
14 |
Register |
| Embedded Systems Development |
2/9/09-2/10/09 |
Electro-Source Kanata (Ottawa) Ontario, CAN |
1,400 |
14 |
Register |
| Embedded Systems Development |
2/10/09-2/11/09 |
Electro-Source Kanata (Ottawa) Ontario, CAN |
1,400 |
14 |
Register |
| Introduction to VHDL |
2/24/09-2/26/09 |
Electro-Source Kanata (Ottawa) Ontario, CAN |
1,800 |
18 |
Register |
| Advanced FPGA Implementation |
4/1/09-4/2/09 |
Electro-Source Kanata (Ottawa) Ontario, CAN |
1,400 |
14 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Oregon |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
| Pennsylvania (Eastern) |
| For this location, please visit our ATP site for the complete class schedule: Bottom Line Technologies |
| Pennsylvania (Western) |
| For this location, please contact the ATP for the complete class schedule: Vai Logic |
| Quebec, Canada |
| Class Title |
Date |
Location / Facility |
Price (USD) |
Training Credit |
Register |
| Advanced FPGA Implementation |
1/27/09-1/28/09 |
Hardent - Montreal, Quebec, CAN |
1,400 |
14 |
Register |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Rhode Island |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Saskatchwan, Canada |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| Vermont |
| For this location, please visit our ATP site for the complete class schedule: Hardent |
| West Virgina |
| For this location, please contact the ATP for the complete class schedule: Vai Logic |
| Washington |
| For this location, please visit our ATP site for the complete class schedule: Technically Speaking |
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