Virtex-5 嵌入式三态以太网 MAC 封装

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产品名称	版本	大小	日期

Virtex-5 Embedded Tri-Mode Ethernet MAC Wrapper v1.4 Data Sheet (PDF) 查看文档详情 The LogiCORE™ IP Virtex™-5 FPGA Embedded Tri-Mode Ethernet MAC Wrapper automates the generation of HDL wrapper files for the Embedded Tri-Mode Ethernet MAC (Ethernet MAC) in Virtex-5 FPGAs using the Xilinx CORE Generator™ software. 有帮助？是 \| 否	3.0	246 KB	2008/03/24
Virtex-5 Embedded Tri-Mode Ethernet MAC Wrapper v1.4 Getting Started Guide (PDF) 查看文档详情 The Virtex-5™ FPGA Embedded Tri-Mode Ethernet MAC Wrapper Getting Started Guide provides information about generating an embedded Tri-Mode Ethernet MAC for Virtex-5 FPGA devices, customizing and simulating the wrapper files utilizing the provided example design, and running the design files through implementation using the Xilinx tools. 有帮助？是 \| 否	5.1	703 KB	2008/03/24