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Home : Documentation : Xcell Journal Online : Article
Program SPI Serial Flash from Xilinx FPGAs and CPLDs



by Rick Folea, CTO, Ricreations, Inc.
rfolea@UniversalScan.com (12/1/05)


It’s easy to do it yourself by using tools available today.
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The good news: starting with the Xilinx® Spartan™-3E device, you can now use industry-standard SPI Serial Flash to configure your Xilinx FPGAs. Even better news: this will be the trend for all new Xilinx devices going forward, meaning that you will have multiple vendors from which to choose inexpensive and readily available memories. The bad news: Xilinx won’t be supporting these devices with programming tools – you are left on your own to program them. In this article, I’ll take a look at SPI Flash, explain your options, and help you get up and running quickly.

SPI Flash – What’s the Big Deal?
Until now, memories used to configure Xilinx devices had to be specific Xilinx supported memories. This meant potentially higher prices per byte of storage and being subject to limited deliveries of devices through limited sources. By making the switch to SPI Flash, you now have many vendors from which to choose, a wider variety of memory densities and types, and most importantly, lower cost and better availability. Figure 1 shows a list of SPI Flash vendors and devices compatible with Xilinx FPGAs supporting SPI Flash.

SPI Flash Varieties
SPI Flash can be lumped into three general categories: SPI Serial Flash for code storage, SPI Serial Flash for data storage, and Atmel’s DataFlash.

DataFlash devices are Atmel’s older Serial Flash AT45DB parts. They are mature, plentiful, and have densities up to 128 MB. They are slightly more difficult to use because the programming and erase algorithms don’t conform to the SPI Flash algorithms, and there aren’t many vendors from which to choose. So unless you absolutely have to have 128 MB of storage, you will probably want to look at the more recent SPI Flash memories.

Figure 1 shows two types of SPI memories: code and data. These are really the same thing, except that data memories have a few extra instructions that allow you to do things like write to memory without erasing first; this comes in handy when you are trying to quickly read/write data from your application. Unless you have a real need for the data memories’ special features, you will probably want to stick with using the programming features of the code memories for now – just because there are a lot more vendors and devices from which to choose. You can still use the data memories, as they are a superset of the code memories, but don’t rely on the data memories’ special command sets if you want to keep your options open.

SPI Flash Memory Caveats
SPI Flash memories from the various vendors are very similar, but there are a few things to watch out for. Most of the newer devices support a “ReadID” instruction so that you can identify the device by polling it. Make sure that you read the fine print in the datasheet. For example, although the ST datasheet for some of the M25P series devices have the ReadID instruction listed, you have to read the fine print, which says that only devices with an “X” at the end of the part number support this feature. I was unable to find these devices anywhere.

Although all vendors’ devices support read/erase/program instructions, they all use different command sets. The commands do the same things, but use different bits for the commands (a page program for an ST device is a 0xD8, but a page program for an ATMEL device is 0x52, for example). See the individual instructions below for more caveats.

Programming SPI Flash Memory
As long as you stick with the basic instructions and keep an eye out for the caveats I’ve discussed, it is really pretty simple to write a small, dedicated SPI flash programmer yourself. Note that all data and commands are shifted in msb first.

To erase the device, simply:

  • Lower chip enable
  • Serially shift in the 8-bit erase command
  • Raise chip enable
You can then check the status register to see when the erase cycle is done or wait the maximum expected erase time (one to several hundred seconds, depending on manufacturer and device density). To read data from the memory array:
  • Lower chip enable
  • Serially shift in the 8-bit ReadData command
  • Serially shift in the address (24 bits on most devices, msb first)
  • Continue issuing clocks, capturing data from the memory serial output
  • Raise chip enable when you have shifted out as many bytes as you want
You can continue issuing clocks right up to the end of the device, at which point the address will wrap and start back at the beginning (on most devices).

To write data to the memory array:

  • Lower the chip enable
  • Serially shift in the WriteEnable command
  • Raise chip enable
  • Lower chip enable
  • Serially shift in the 8-bit PageProgram command
  • Serially shift in the address (24 bits on most devices, msb first)
  • Shift 8-bit data in, msb first (you can clock up to 256 bytes at a time on most devices)
  • Raise chip enable
  • Monitor status register or just wait the maximum time (a few msec, typically) to see when write is complete
  • Repeat for next page (typically 256 bytes)
Note that if you go past a page boundary, the data will wrap and overwrite the data at the bottom of the page – it will not continue on to the next page.

That’s all you really need to get started. As you can see, it is really pretty simple to program an SPI Flash memory, especially if you are creating a small programmer for a dedicated application and you stick with the basic command set.

Tools Available Today
Creating your own programmer works well on a microprocessor where you have an SPI port and room in your memory for a few extra functions. But what if you want to program a memory connected to a small CPLD or FPGA? You may be surprised to find that there are not a lot of low-cost, simple, general-purpose programmers available. The options we have today for non-microprocessor applications fall into the categories I’ll discuss next.

Dedicated FPGA Configuration
Because the command set is small and simple, some designers have resorted to creating a dedicated FPGA configuration that can be used to program the SPI Flash. The designers at Memec (recently purchased by Avnet) have taken this one step further – their configuration uses the MicroBlaze™ soft-core processor and onchip peripheral bus (OPB) SPI core. Given the processor in the FPGA, they simply wrote an application to read and write the SPI Memory. They ran a great demo of this at the XFEST seminars last Spring that showed how the SPI Flash could be used to:

  • Configure the FPGA (Spartan-3E device)
  • Boot the MicroBlaze processor
  • Be used for non-volatile data storage
Call your local Memec/Avnet FAE for a demo or more information. These methods provide very fast SPI Flash access, but require a device with enough space to accommodate the configuration. You could not use it on a CPLD or other non-configurable devices.

X-SPI Utility
There is a little-known utility on the Xilinx website called “X_SPI.” If you put an extra header on your board and can 3-state all devices connected to the SPI bus, then you can use this command-line utility to directly program your SPI Flash with a Xilinx Parallel-III or Parallel-IV cable. This is documented in XAPP800, “Configuring Xilinx FPGAs with SPI Flash Memories Using CoolRunner-II CPLDs,” along with a method to use a CoolRunner™ CPLD to transform the SPI signals into the signals required by Xilinx FPGAs (pre-Spartan-3E devices). The downside to this approach is that you have to add an extra header to your board, be able to 3-state all devices on the SPI bus, and hope that the utility supports the SPI Flash device you want to use.

A Better Way – JTAG XAPP800 also mentions JTAG, but at the time there were no simple, inexpensive general-purpose tools available to program SPI Flash through JTAG. Now, the latest release of Universal Scan supports programming of SPI Flash. We offer a free trial and the SPI programming feature has been added to this hardware debugging and memory programming tool without increasing the price. Using the Boundary Scan chain in your Xilinx device to program SPI Flash is a snap – you just specify which pins are connected to the SPI device, choose a data file, and hit “program.” You don’t need any test vectors, test executives, CAD data, or anything else normally associated with Boundary Scan test and programming operations. The pins on the Xilinx device are placed into EXTEST; vectors are automatically formatted and shifted in to drive the SPI Flash memory pins, and the next thing you know the memory is programmed. It includes the usual erase, program, and verify functions along with a memory viewer, utilities, sector erase capability, and automatic device ID interrogator.

The beauty of this method is that you can use it on any FPGA, CPLD, microprocessor, Ethernet switch, or DSP – any device that has a JTAG port. The device does not need to be configured or programmed (or even necessarily working entirely correctly) for this to work. Plus, it requires no additional precious device resources in your FPGA or CPLD, no special code or configurations, and does not require any special headers or other support devices on your circuit card.

There is a downside to this – it can be much slower than the other methods because you have to shift a full-scan vector into the JTAG chain for each and every clock edge, data setup, and chip enable. As an example, suppose you have an FPGA with a scan chain of 2,000 bits. It takes one scan to setup the serial data into the SPI Flash, another to raise the clock, and yet another to lower the clock. We need eight sets to shift a single byte into the SPI Flash memory, and that’s 48,000 clocks just to get 8 bits into the Flash device. Multiply that by the number of bytes you have to program and you can see why it takes a while, especially if you use a parallel port that is fundamentally limited to a few hundred kilohertz TCK rate.

If you need to speed up the programming time, take a look at the newer USB2.0 versions of these products; they increase the TCK rate by an order of magnitude. You can also make sure the SPI device is connected to a device with a short scan chain and put all the other devices into bypass mode to help speed things up.

There are also traditional JTAG tools available that will program SPI Flash, and if you are lucky enough to have access, definitely take advantage of them. These tools are very powerful and can program memories rapidly. The only drawback is that they can require more setup than the method outlined previously and also tend to be more expensive. But if you need speed, the traditional Boundary Scan tools are a great option. (See the sidebar for a list of JTAG tool vendors.)

Other Methods
Most SPI Flash vendors have some kind of utility for programming their devices, but they are usually limited to their devices, require direct connection to the device, or are a cost adder to another set of utilities.

Conclusion
Figure 2 summarizes all of these options I’ve described. If you need speed – design your own. If you can afford some board modifications and an extra header, consider using the X-SPI utility, which is free. Otherwise, take a look at the new JTAG tools available for your SPI Flash programming needs; they are easy to use and inexpensive. The proliferation of SPI Flash devices, memory densities, and ease of use make SPI Flash an ideal configuration or data storage solution for your next design. And because Xilinx is leading the way for future devices, there is no time like the present to get started.

For more information about Universal Scan, visit www.universalscan.com.

JTAG Tool Vendors
JTAG Technologies www.JTAG.com
Acculogicwww.acculogic.com
Corelis www.corelis.com
Goepel www.goepel.com
Assett-Intertech www.assett-intertech.com
Intellitech www.intellitech.com
Flynn www.flynn.com
Universal Scan www.universalscan.com

Printable PDF version of this article with graphics. PDF logo (12/1/05) 210 KB

 
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