Xilinx® EasyPath™ FPGAs are the industry’s only customer-specific solution that gets you to volume production with very little risk and in as few as eight weeks. EasyPath FPGAs use the same silicon as standard FPGAs. The key difference between the two is that while the former are tested for specific customer designs, the latter are tested for all possible customer designs. By testing to a specific design, EasyPath FPGAs provide as much as an 80% reduction in unit price (due to improved yields) compared to the equivalent standard FPGAs.

One of the major advantages of EasyPath devices is that because they are identical (in all aspects except testing) to standard FPGAs, all features supported in standard FPGAs are in turn supported in the analogous EasyPath FPGA. From a customer perspective, this means that very little engineering resources are required to interface with Xilinx. The migration process itself is essentially risk-free. Once the design files are handed off, Xilinx creates custom test patterns based on the design to get to a guaranteed 99.9% stuck-at fault coverage. With EasyPath FPGAs, you get the same extensive Xilinx IP portfolio without any additional licensing fees for the EasyPath conversion.

Just as with structured ASICs (or standard cell ASICs), you would typically move from a standard FPGA to an EasyPath FPGA when your design has been frozen and the volumes justify a cost-reduction path. However, unlike structured ASIC solutions, EasyPath FPGAs provide you with some unique flexibility features, including:

• Dual bitstream and in-system engineering change order (ECO) capability
• Flexibility in production and lifecycle management
• Ability to use all standard FPGA features without any constraints

A second way you can use the dual bitstream option is to try and address two different industry standards at the same time. Product specifications and market viability in many wired and wireless segments, for example, depend heavily on evolving standards. Given long product development cycles and the importance of being first to market, you can now go to market with potentially two different versions of a product to hedge your market position. When you exercise the dual bitstream option, Xilinx ensures that all of the resources corresponding to both designs are tested.

Another important flexibility feature in Virtex-4 and Spartan-3 families is the ability to make in-system ECOs. Specifically, the ECO feature allows you to make modifications to the combinatorial logic in an EasyPath FPGA (contained in look-up tables [LUTs]) and I/O block (IOB) parameters (such as drive strength and slew rate) even after volume shipments have begun and devices are deployed. Xilinx ensures that 100% of the LUTs used in the design and all combinations of drive strengths and slew rates for IOBs are completely tested to allow for any potential changes later.

This feature allows you to make simple bug fixes (within a LUT) such as adding or removing an AND gate or tweaking the drive strength of an I/O based on system requirements with minimal disruption to ongoing production. You can open the configuration equation of a LUT or the relevant IOB within the FPGA Editor tool and make modifications without having to rerun synthesis and implementation. To learn more about making these changes using FPGA Editor, see XAPP803, “Leveraging ‘In-System ECO’ Capability of Spartan-3 and Virtex-4 EasyPath FPGAs” at www.xilinx.com/bvdocs/appnotes/xapp803.pdf.

Figure 1 shows a screenshot of the FPGA Editor user interface that you would use to drill down into the functional blocks you want to change. The change process itself requires no intervention from Xilinx. You can make changes on your own, generate a new bitstream, download it into the EasyPath devices already in production, and implement a bug fix in the field in a very short time.

Production Flexibility
Another big advantage of EasyPath FPGAs is that because they are very similar to standard FPGAs, they can be used interchangeably with a standard FPGA on a given board. (All EasyPath devices are offered in the full range of packages as the corresponding standard FPGAs.) The advantage of this interchangeability is that should a design modification be required that cannot be accommodated by the ECO feature, you can quickly make modifications in a standard FPGA and continue shipping in production with standard FPGAs for the eight weeks or so that it takes to do the EasyPath migration of the modified design.

Because of the identical nature of EasyPath FPGAs and standard FPGAs, no additional prototyping phase or requalification is required. Instead, you go directly from design freeze to full production in as little as eight weeks. This quick turnaround allows you to postpone your design freeze milestone in the product development cycle and adapt to any last-minute changes in market conditions, demand, or design specifications. In today’s age of just-in-time supply chain management, EasyPath devices enable you to get to market quickly without the constraints of large inventories.

No Constraints on FPGA Designs
With alternative cost-reduction solutions such as structured ASICs (or standard cell ASICs), you typically have to plan ahead to take advantage of the lowered cost. Some of the migration issues you may face when converting from FPGAs to structured ASICs are well documented (see the November 2004 article in the FPGA Journal, “Customer-specific FPGAs: Low-cost solution for volume production”). To get around some of these issues, some vendors impose significant constraints on the up-front FPGA design, thus reducing the flexibility that FPGAs are designed to provide.

EasyPath FPGAs, on the contrary, do not impose any design constraints. You can take full advantage of the flexibility and embedded features (such as multipliers, PowerPC™, Ethernet MACs, and high-speed transceivers) in standard FPGAs to cost-reduce if the design/market conditions are appropriate.

Conclusion
With the introduction of Spartan-3 and Virtex-4 EasyPath FPGAs, you can now prototype with standard FPGAs and then move to the corresponding lower cost EasyPath FPGA in a seamless fashion. The unique in-system ECO and dual bitstream capabilities in these EasyPath FPGAs allow you to make changes in your design and target different functional modes even after you have moved into high-volume production.

The quick time to market and interchangeability of standard FPGAs with EasyPath FPGAs allows you to implement bug fixes and efficiently manage inventory without loss of revenue or disruption of production. In addition, EasyPath FPGAs do not impose constraints on the FPGA design, thus leaving you with the flexibility to choose if and when you want to freeze your design and cost-reduce.

The EasyPath: “Migration-Free Advantage”

Since their introduction in March 2002, EasyPath FPGAs, which offer an innovative approach to high-volume cost reduction, have received broad market acceptance. This has been driven by the higher level of flexibility and ease of migration offered by EasyPath FPGAs when compared to traditional ASIC solutions. In the past year, EasyPath FPGA usage has grown by more than 600% by enabling customers in applications from communications equipment to storage solutions to achieve a total cost of ownership that is lower than any ASIC. With the introduction of Virtex-4 EasyPath and Spartan-3 EasyPath FPGAs, customers will continue to benefit from the EasyPath “migration-free” advantage.

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