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To meet their system design goals, designers
today must prototype a new idea and
integrate its product features into the lowest
cost silicon, complete with versatile
functionality. Specifically, two of the
biggest challenges are to get the design correct
in the first place and to fix a problem
rapidly. Immediate design solutions are
essential for meeting time-to-market pressures,
keeping up with changing industry
standards, and prototyping quickly.
Even after the design is completed, a need
may exist for field upgradeability if a bug is
found or a new functionality is available. The
Xilinx® Spartan FPGA has been a great
low-cost programmable platform for lowdensity
control logic and system interfaces.
However, when it comes to signal processing,
designers traditionally purchase a fixed algorithm
standard product for high-speed multiply
and accumulate (MAC)
functions. This requirement demands
additional design resources, verification
time, system components, and more
board space.
With the explosion of the wireless
communication market and proliferation
of low-cost 90 nm processes,
Spartan-3 devices with plenty of logic,
memory, and as many as 104 18 x 18
embedded hard multipliers are the ideal
solution for many signal processing needs.
The challenge for todays digital processing
systems is their large memory
requirements and the very fast MACs needed
for rapid mathematical operations. Every
multimedia system contains an external
DSP processor and memory component
that reduces system performance and
increases component costs. Once you have
uncovered a solution that integrates a parallel
or semi-parallel system, you can then
focus on improving the overall DSP design
to eliminate performance bottlenecks.
As a result of digital processing challenges,
many companies have focused their
efforts on developing the system-on-chip
(SOC) concept by adding feature sets to bring additional functionality to a single
piece of silicon. Customized ASICs have
become very costly solutions in todays competitive
landscape. Traditional DSP processors
are capable of carrying out high-speed
MAC operations, but have bandwidth limitations.
FPGA technology has made tremendous
progress in recent years by increasing a
large number of intellectual properties to
reduce the cost of silicon development in various
markets. This is accomplished by optimizing
architectures, using leading process
technologies, and adding IP cores.
Some of the typical applications for digital
signal processing are digital cameras,
phones, 3G wireless, video conferencing
systems, and high-definition digital televisions.
Having a signal processing capability
inside an FPGA is the perfect design innovation
the stepping stone to system-on-chip
in an FPGA without the high cost of
complex customized chip development.
System Generator for DSP
Xilinx expanded its features in the Spartan-3
FPGA by adding embedded multipliers in
the architecture. This technological innovation
is similar to embedded block memory,
clock management, and multiple
standards for high-speed I/O circuits, all
standard characteristics of the Xilinx
Spartan-3 and Virtex-II Pro families.
Time to market remains critical for
companies developing both system hardware
and software. With Xilinx System
Generator (SysGen), you can simultaneously
create behavioral-level hardware
blocks and simulate the entire system with
just a few tool clicks. The design environment
allows you to create block-based systems
like digital QAM modulators for
software-defined radio, finite impulse
response (FIR) filters, image processing
functions, mathematical operators, A/D
and delta-sigma D/A conversion, and all-in-one silicon for widely used applications.
Using System Generator within the
Simulink design environment from The
MathWorks, you have unrestricted access
to many blocks. You can select both Xilinx
and third-party blocks, drag and drop to
the Simulink work space, connect, and
simulate a system within minutes. The
Xilinx System Generator block is used to
select various implementation options such
as FPGA device, package, speed, system
clock, synthesis options, and HDL. The
need to write HDL is eliminated, as the
tool creates the proper language for you;
however, it can write HDL if you prefer.
Simulink also enables you to integrate
blocks from many different libraries.
Commonly used DSP block sets include
math functions, signal management, a variety
of filters, transforms, encoders, decoders,
and linear feedback shift registers. For example, you can create a fast Fourier transform
(FFT) or FIR core with the easy-to-use GUI
in System Generator for DSP, customize the
core as per your application, and run the
Xilinx ISE tool in the background to
build your signal processor system. This
flow can synthesize, place, route, and generate
hardware configuration files.
The Simulink environment allows you to
verify the functionality of each block or subsystem
created with scopes and graphs to
view images or observe data.
Digital filters are among the most significant
components in digital signal processing
applications. The function of a filter is to
eliminate undesirable parts of the signal
(random noise) or to extract signals in a particular
frequency range. Basic FIR filters are
used extensively in video broadcasting and
wireless communications. A mathematical
expression of a basic FIR filter is:
Y (n) = SUM h (k) * x (n-k); k=0 to k =N-1
It consists of an input sample, output
sample, and coefficients. Imagine x is a
continuous stream of input signal and y is
a resulting filtered stream of output signal.
The n and k in the equation correspond
to a particular instant in time, so to compute
y (n) at time n, a group of input samples
at n different points in time are required, or
numerically x (n), x (n-1), x (n-2) ... x (n-k).
A group of n input samples are multiplied
by n different coefficients and summed
together to form a result y (n).
This design example implements a 43-tap FIR filter with a MAC engine and a
dual-port RAM used for data and coefficient
storage. The filter is a low-pass filter
with a cut-off frequency of 6 KHz. The
sampling frequency is 44.1 KHz.
Figure 1 represents the model of the filter.
The model has a coefficient width of
12, a coefficient binary point value of 12, a
data width value of 10, a data binary point
value of 8, and a sampling frequency of
44.1 KHz. Scope shots of the filtered output
are shown in Figure 2. An implementation
summary displaying the use of RAM
and multiplier resources is shown in Figure 3. This design achieved ~ 125 MHz performance
in a -4 speed grade of the
Spartan-3 device.
The NuHorizons Spartan-3 Board
Xilinx, its distributors, and third-party
companies offer several boards for prototyping
or emulating a DSP-based system. A
low-cost prototyping platform from Nu
Horizons Electronics Corp. is the Spartan-3 development board (HW-AFX-SP3-2000-DB) (Figure 4). The board comprises
these elements (Figure 5):
- Xilinx XC3S2000-4FG676
Spartan-3 device
- XCF08 Flash PROM for configuration
- 4 x 24-character LCD display
- Graphical LCD interface
- 64 Mb SDRAM (2-1 Mb x 16 x 4)
- 32 Mb Flash 2 Mb x 16
- 50 MHz clock oscillator
- PLL clock multiplier
- CAN 2.0B transceiver
- RS232 interface
- PS2 interface
- Audio CODEC
- Two-channel A/D and D/A converter
- 10/100 Ethernet MAC
- 10/100 Ethernet PHY
- Flash memory interface
- SDRAM memory interface
- LED/push buttons
- JTAG configuration header for
programming
- 16-bit LVDS I/F with clock and control
- Test point headers for debugging
This fully loaded Spartan-3 development
board is priced at $449, which
includes all of the features necessary to prototype
a DSP-based system design. The
board comes with a users manual, power
supply, documents, and design files. The
option of getting the board bundled with
ISE Foundation software, System
Generator, and ChipScope Pro software
is also available at an additional cost.
Besides DSP designs, the Spartan-3
platform is a great tool to implement many
other Xilinx reference designs. Several
designs written by Nu Horizons field
application engineers cover topics such as
memory controllers, embedded processors,
hardware-in-the-loop with digital signal
processing, and system monitor design
using ADC and DAC on the board. ADC
and DAC are very powerful attributes of
our low-cost board, and two of the many
competitive board features. The Spartan-3
platform can be expanded with the add-on
ADC board from Linear Technology.
Conclusion
With fast multipliers and lower cost FPGAs,
engineers now have the ideal solution to
their signal and image processing requirements.
With tools like System Generator,
anyone can implement a powerful parallel or
semi-parallel customized DSP system-on-chip
design within days.
The Spartan-3 board from Nu
Horizons is a perfect solution for prototyping
signal processing using Spartan-3
FPGAs. The board has all of the interfaces
necessary to create designs for wireless
and digital imaging applications if
you want to:
- Integrate your logic and signal processing
capability on a single chip
- Prototype a configurable DSP systemon-
chip
- Reduce the cost of conventional serially
implemented external signal processors
- Improve system performance
Nu Horizons is also in the process of
releasing a Virtex-4 platform board for customers
requiring higher density logic, more
memory, and hard MACs running up to
500 MSPS for high-performance interfaces
to video and imaging applications.
For all of the designs and related
documentation for the Spartan-3 board,
visit the Nu Horizons website at
www.nuhorizons.com/sp3/.
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