ISE™ 7.1 or later
The Xilinx MPEG-4 Part 2 Simple Profile Decoder core is a fully functional VHDL design implemented on a Xilinx FPGA. The MPEG-4 core accepts compressed video information and recreates a video image suitable for display based on the “Information Technology–Generic Coding of Audio Visual Objects-Part 2 Visual” section of the ISO/IEC 144962-2 standard.
